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Peripheral Imaging Corporation
PI3034A 200DPI CIS Sensor Chip Engineering Data Sheet
Description:
Peripheral Imaging Corporation PI3034A CIS sensor chip is a 200 dot per inch resolution linear array image sensor chip, which uses PIC's proprietary CMOS Image Sensing Technology. This image sensor's intended applications are to fabricate Contact Image Sensor, CIS modules with various lengths. This is accomplished by mounting them on a printed circuit board (PCB) through an end-to-end butting process. This process is generally referred to as the chip-on-board technology. Its typical circuit implementation in an A4 size 1728 elements CIS module is shown in a schematic diagram on page 6. The schematic demonstrates its operational implementation and interfacing circuits. They are used in facsimile, scanner, check reader, and office automation equipment. Figure 1 is a block diagram of the sensor chip. Each sensor chip consists of 64 detector elements, their associated multiplexing switches, buffers, and a chip selector. The detector element-to-element spacing is approximately 125 um. The size of each chip without scribe lines is 7950 um by 290 um. Each sensor chip has 6 bonding pads. The pad symbols and functions are described in Table 1.
7950 m
1 2 3 4
Row of 64 Sensors and Video Signal Line Multiplexer Read Out Shift Register
61
62
63
64
290 m
Buffer
SI
Buffer
CLK VDD VSS
Chip Select SIG
Buffer
SO
Figure 1. PI3034A Sensor Chip Block Diagram
Page 1 of 7 - PI3034A, 06/15/03
SYMBOL SI CLK VDD VSS SIG SO
FUNCTION Start Pulse: Input to start the line scan. Clock Pulse: Input to clock the Shift Register. Positive Supply: +5 volt supply connected to substrate. Digital Ground: Connection topside common. Signal Current Output: Output for video signal current End of Scan Pulse: Output from the shift register at end of scan.
Table 1. Pad Symbols and Functions Bonding pad layout diagram:
Figure 2 shows the bonding pad locations for PI3034A Sensor Chip relative to the lower left corner of the die.
7950 m SENSOR DIE
Y
290 m SIG SO
SI
X X
CLK
VDD
GRD
NOTE: ALL PAD OPENINGS ARE 140 X 80 m.
NOTES: 1. THE DRAWING IS NOT TO SCALE. 2. THE DIE LENGTH AND WIDTH ARE GIVEN AS SHOWN. 3. THE PAD LOCATION ARE GIVEN IN THE TABLE. 4. THERE ARE TWO EXAMPLES OF THE X AND Y LOCATIONS SHOWN ON THE FIRST TWO PADS. THEY ARE MEASURED TO THE LEFT BOTTOM CORNER OF THE PAD OPENING. 5. ALL DIMENSIONS ARE IN m.
PAD SI CLK VDD VSS SIG SO
FUNCTION START INPUT CLOCK INPUT +5 SUPPLY GROUND VIDEO SIGNAL OUT SCAN OUTPUT
Y 67.5 67.5 67.5 67.5 67.5 67.5
X 737.0 1546.5 2356.0 3156.5 3975.0 7213.0
PI3034A IMAGE SENSOR
Figure 2. Bonding Pad Layout Diagram Electro-Optical Characteristics (25 C)
Table 2, below, lists the electro-optical characteristics of PI3034A sensor chip at 25 C.
Parameters Number of Photo-elements Pixel-to-pixel spacing Line scanning rate Clock frequency Video Output Voltage Amplitude Output voltage non-uniformity
Symbols
Tint (1) f (2) Vp (3) Up (4)
Typical 64 125 3.45 0.5 1.0 7.5
Units elements m ms/line MHz Volts %
Notes
Vp depends the output circuits. See note 3.
Page 2 of 7 - PI3034A, 06/15/03
Chip-to-chip non-uniformity Dark output voltage Dark output non-uniformity
Ud Vd Ud
(5) (6)
7.5 <50 <50
% mV mV
Table 2. Electro-Optical Characteristic
Notes: (1) Tint stands for the line scanning rate or the integration time. It is determined by the time interval between two start pulses. (2) f stands for the input clock frequency: @ 500 kHz the total active line scan time for a A4 CIS module is 3.45 ms of the line integration time. (3) Vp is an average of the pixel amplitudes in one complete line scan. These video pixels are converted from signal currents produced by the phototransistor at each pixel site. The signal current charges the video line capacitance that is isolated with amplifier buffer. The output current is proportional to the charges that have been collected on the phototransistor's base through a photon-to-electron conversion process. These charges on the base draw signal current through the emitter proportionally to the Beta of the phototransistor. Then the emitter current flows out onto the output video line capacitance where it is integrated and converted to signal voltage. This is the signal voltage that the host receiver senses. Before accessing the subsequent pixel, this video signal on the video line capacitance is reset through a shunt switch on the video line. Then the next pixel in sequence is readout onto the video line. This video buffer amplifier terminating the video line provides the necessary amplification. Most user generally set their operating output signal to ~ 1.0 V peak average with the saturation level of ~ 1.5 V. For the circuit reference see the attached schematic diagram on page 6. Typical amplification (adjustable) gain is between 4 to 5 times the voltage that is measured on the video line. (4) Up = [( Vpmax-Vp)/ Vp]x100% Or [( Vp-Vpmin)/ Vp]x100%
Where Vp =
Vpn / N
n
N
Vpmax is the maximum pixel output voltage in the light. Vpmin is the minimum pixel output voltage in the light. In the light means module exposed a uniform light. (5) Vd = ( Vdmax+Vdmin)/2 Vdmax is the maximum pixel output voltage in the dark. Vdmin is the minimum pixel output voltage in the dark. In the dark means that sensor has no exposure to the light. (6) Ud = [( Vdmax-Vdmin)/ Vd]x100%
Absolute Maximum Ratings (not operational conditions):
Parameters Power Supply Voltage Power Supply Current Input clock pulse (high level) Input clock pulse (low level) Symbol VDD IDD Vih Vil Maximum Rating 10 <2.0 Vdd + 0.5 -0.25 Units Volts ma Volts Volts
Table 3. Maximum Specification
Page 3 of 7 - PI3034A, 06/15/03
Operating Conditions at Room Temperature
Parameters Power Supply Input clock pulses high level Input clock pulse low level Operating high level exposed output Clock Frequency Clock pulse duty cycle Clock pulse high durations Integration time Operating Temperature Symbol VDD Vih (1) Vil (1) Vsig (Isig) (2) f tw Tint Top Min. 4.5 3.0 0 Typical 5.0 5.0 0 1.0 0.5 25 0.5 3.45 25 Max. 5.5 VDD 0.8 Units Volts Volts Volts Volts MHz % sec ms o C Notes 1 1 2
1.0
10 50
Table 4. Operating Specifications
Note: (1) Applies to both CLK and SI. (2) See note 3 under Table 2. Electro-Optical Characteristics. See the schematic on page 6.
Switching Characteristics @ 25 C
to CLK tprh tdh SI tds Vsig tsh tdl tw
Figure 3. Timing Diagram of the PI3034A Sensor
Page 4 of 7 - PI3034A, 06/15/03
Item Clock cycle time Clock pulse width(1) Clock duty cycle Data setup time Data hold time Prohibit crossing time(2) EOS rise delay EOS fall delay Signal delay time(3) Signal settling time(3)
Symbol to tw tds tdh tprh terdl tefdl tdl tsh
Minimum 1000 250 25 50 20
Mean
Maximum 10000
Units ns ns % ns ns ns ns ns ns ns
50
75
30 60 70 100 200
Table 5. Timing Symbols and Definition
Notes: 1. Clock pulse width varies with frequency, as it was explained foregoing paragraphs. 2. Prohibit crossing time to insure that two start pulses are not locked into the shift register during any single scan time. 3. Pixel delay times and settling time depend on the output amplifier. The numbers, which are given, are measured with an EL2044 amplifier. The faster the amplifier, the faster the signal will respond. In other words, faster rise and settle times are faster.
Output Circuits for Video Signal
The circuit in following page shows the PI3034A in a CIS module application. It also serves not only a reference for the above operational explanation given in note 3 under Table 2. Electro-Optical Characteristics; it further exemplifies a method for interfacing the device in developing a 1728 element, A4 size CIS module.
Page 5 of 7 - PI3034A, 06/15/03
PIN DEFINITION ON THE PI3034A SENSORS
SP IS THE SAME AS SI.
T1 TESTPOINT S1 PI3034A SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS S2 PI3034A S3 PI3034A S4 PI3034A S5 PI3034A S6 PI3034A S7 PI3034A S8 PI3034A T2 TESTPOINT T3 TESTPOINT T4 TESTPOINT T5 TESTPOINT T6 TESTPOINT T7 TESTPOINT T8 TESTPOINT S9 PI3034A SP CP VDD DGND IOUT EOS T9 TESTPOINT
CP IS THE SAME AS CLK.
VDD IS THE SAME, VDD. DGND IS THE SAME AS VSS.
IOUT IS THE SAME AS VSIG.
EOS IS THE SAME AS SO.
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 3 74HC00 VDD C1 0.1UF 5
U1B 6
U1A
2
74HC00
C2 0.1uF
1 VOUT 2 GND 3 VDD 4 VN 5 GND 6 SP 7 GND 8 CP 9 GLED 10 VLED T10 TESTPOINT S10 PI3034A SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS S11 PI3034A S12 PI3034A S13 PI3034A S14 PI3034A S15 PI3034A T11 TESTPOINT T12 TESTPOINT T13 TESTPOINT T14 TESTPOINT T15 TESTPOINT S16 PI3034A
T16 TESTPOINT S17 PI3034A SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS
T17 TESTPOINT S18 PI3034A SP CP VDD DGND IOUT EOS
1 2 3 4 5 6
4
T18 TESTPOINT
P1
VDD
14
9 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 1 2 3 4 5 6 11 10 VDD U1C 74HC00 8
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
U1D
1 2 3 4 5 6 7 8 9 10
13
74HCT00
CONN-10PIN
J1 C3 0.1uF
7
1 2
VLED GLED
C5 0.1UF
SMT JUMPER PADS
T19 TESTPOINT S19 PI3034A SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS SP CP VDD DGND IOUT EOS S20 PI3034A S21 PI3034A S22 PI3034A SP CP VDD DGND IOUT EOS
T20 TESTPOINT
T21 TESTPOINT
T22 TESTPOINT S23 PI3034A SP CP VDD DGND IOUT EOS
T23 TESTPOINT S24 PI3034A SP CP VDD DGND IOUT EOS
T24 TESTPOINT S25 PI3034A SP CP VDD DGND IOUT EOS
T25 TESTPOINT S26 PI3034A SP CP VDD DGND IOUT EOS
T26 TESTPOINT S27 PI3034A SP CP VDD DGND IOUT EOS
1 2 3 4 5 6
12
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
1 2 3 4 5 6
VDD
C4 0.1uF
VDD C6 10uF U2 R1 50 7 C7 0.1uF C8 50pF + V- V+ 3 VDD
1
2
3
4
8
9
10
EL2044C 6
2Z
2Y
3Y
3Z
4Z
4
2
R2 2K
3
VCC 1 Y 1E 1Z GND
2E
3E
R5 1K 2 R4 2K C12 3 5pF R6 1K 2 1
C9 0.1UF
U3D 5 13 CD4066
U3C 6 CD4066
4E
VDD
14
7 U3B 12 CD4066
C10 10uF
C11 0.1uF
C13 150pF
1
4Y
R3 2K
U3A CD4066
11
1 2 3 4 5 6
Page 6 of 7 - PI3034A, 06/15/03
T27 TESTPOINT
(c)2003 Peripheral Imaging Corporation. Printed in USA. All rights reserved. Specifications are subject to change without notice. Contents may not be reproduced in whole or in part without the express prior written permission of Peripheral Imaging Corporation. Information furnished herein is believed to be accurate and reliable. However, no responsibility is assumed by Peripheral Imaging Corporation for its use nor for any infringement of patents or other rights granted by implication or otherwise under any patent or patent rights of Peripheral Imaging Corporation.
Page 7 of 7 - PI3034A, 06/15/03


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